Planarization techniques are critical for the process of new generation ULSI (Ultra-Large Scale Integrated Circuit) devices such as high-speed, high-computation power CPUs and high-density memory chips. These devices usually comprise multiple layers, with alternating metal and dielectric materials built on top of each other. The metal layers consist of finely spaced, fine-featured interconnect lines to transmit electric signals. The widths of these lines in today's ULSI devices are in the 0.5 .mu.m range or smaller. The dielectric layers provide electrical isolation and mechanical support for the metal interconnect lines. The dielectric materials, typically SiO2, also fill the space between the metal lines. Each of the metal lines is "patterned" or fabricated on top of the dielectric layer using lithography methods. The lithography for pattern resolution below 0.5 .mu.m requires that the dielectric layer be extremely planar so that its variation in height is kept in the range of tens of angstroms. The planarity needs to be both local and global over an entire lithography field due to the shallow depth of focus ("DOF") of exposure tools for optical lithography below 0.5 .mu.m.
Conventional techniques used to achieve higher level wafer planarization include irradiating the wafer with a laser; coating the wafer with spin-on glasses, resins or other polymers; and treating the wafer with thermally reflowing materials like BPSG. As an alternative, new dielectric deposition techniques such as TEOS-ozone at atmospheric pressure, ECR CVD and dep/etch/dep schemes in cluster tools are also being used for this purpose. However, none of these conventional planarizing techniques is capable of providing the required global planarity for advanced processes.
CMP is the only known planarization technique that meets the extreme planarity requirements on the global scale. CMP is the process of removing of surface material from the substrate by both mechanical abrasion and chemical etching. During the CMP process, the substrate being polished, such as a wafer, is held on a carrier (head) and is pressed against a polishing pad soaked with an abrasive slurry. Most CMP equipment generates relative circular, orbital, lapping or a combination of these motions between the carriers and the pad to effect mechanical abrasion, while the etchant in the slurry effects chemical etching. While CMP has demonstrated planarization capabilities beyond other current planarization techniques, its constraint has been low-throughput (typically, 20-40 wafers per hour) and, therefore, high cost of ownership.
The material removal rate (or polishing rate) of the CMP process can be determined by the following semi-empirical relationship known as Preston's equation: EQU Removal Rate (angstrom/minute)=K.times.P.times.V.sub.REL
where P is the pressure between the substrate and the pad, V.sub.REL is the relative linear velocity between an arbitrary point on the substrate and its projection on the pad, and K is a constant determined by the chemical composition of the slurry, the process temperature, and the pad surface. In traditional CMP equipment, the carrier that holds the wafer is pressed against the pad, which is glued to a horizontal platen. In addition to the rotation of the carrier, the platen has to also rotate to effect a more uniform distribution of relative linear velocities, V.sub.REL for all points on the wafer. Concurrent rotation of the carrier and the platen is necessary because, without it, V.sub.REL will be zero at the center of the wafer and largest at the edge of the wafer. According to Preston's equation, this will result in a very low removal rate at the center of the wafer and a large removal rate near the edge of the wafer.
It is apparent then to obtain uniform removal rates across the wafer, V.sub.REL has to be uniform for all points on the substrate. The substrate is round for wafers and rectangular for FPD. In traditional CMP equipment, the platen has to be sufficiently large to accommodate the carriers which are placed near the edge of the platen, so that the relative linear velocity of the wafer center is close to that of its edge. The typical diameter of the platen is 30 to 36 inches and the typical rotational speed is 20 to 40 rpm. The typical pressure applied to the wafer during CMP process is about 7 psi. When pressing one 8 inch (200 mm) wafer onto the platen at the aforementioned pressure, the total applied force is 352 pdf (pound force). However, to obtain micron level precision and uniformity on polished wafers, the deformation on the rotating platen has to be minimal. To achieve such goals, the platens used in various existing CMP equipment are necessarily large and bulky.
As a result of this size constraint, the aforementioned CMP equipment may not be suitable for polishing new generation FPD and wafer substrates which are in the trend of becoming larger. In particular, if a 12 inch (300 mm) wafer, used in the fabrication of next generation ULSI devices, is pressed onto a platen at the aforementioned pressure, a downward force of 792 pdf will be dynamically loaded on the platen. The platen will then have to be yet larger and bulkier than the current configuration. In addition, if multiple heads are used on the same platen to increase the throughput; for example, 6 heads holding 8 inch (200 mm) wafers, then the total down force on the platen can be as high as 2112 pdf. If three heads holding 12 inch wafers are pressed against the platen, then the total down force can be 2376 pdf. Furthermore, in order to increase throughput, the rotation speed of the platen has to be higher, which requires an even bulkier support for the platen.
The above described CMP processes and apparatuses are therefore far from ideal and need substantial improvements.
First, a major disadvantage of traditional CMP equipment is its limited productivity. The largest relative linear velocity obtainable from the head/platen mechanism used in the traditional CMP equipment is 150 ft/min in practice, which severely limits the largest removal rate achievable by such mechanism.
Second, a large mounting area is another disadvantage of current CMP polishers, because these polishers employ a horizontally oriented large platen. Such polishers commonly have a footprint over 25 square feet, which takes valuable manufacturing space in modem wafer fabrication plants.
Third, as set forth above, the head/platen mechanism employed by current CMP technology is unsuitable for larger wafer and FPD polishing as their sizes increase in the future (i.e, 12 inch wafer). The platen has to be very bulky to provide stability against a large orbital down force.
Fourth, as set forth above, the platen has to be large, or otherwise, an oscillating mechanism which sweeps the carrier across the platen is needed in order to obtain uniform relative linear velocities across a large substrate to achieve a uniform removal rate across the substrate.
There is therefore a need for a new kind of CMP equipment that can increase wafer throughput, reduce the equipment footprint, accommodate the polishing of large wafers or FPDs, and provide a uniform removal rate over the entire substrate being polished.
It is thus an object of this invention to provide a belted CMP machine orientable in multiple directions that has substantially higher throughput, smaller footprint, higher relative velocity (i.e., 600 ft/min) uniformly across the substrate, and a higher degree of planarization in a more compact mechanism than is currently available.
It is a further object of the invention to provide a CMP machine whose design is inherently more suitable to polish large size wafers and FPDs which are otherwise unsuitable and less desirable to be handled by prior art polishers and methods.
It is a further such object of this invention to provide a belted CMP machine having a less bulky construction to generate a high relative velocity without increasing machine size as does in current rotating platen, such machine is provided with a stationary wafer support to eliminate the need for a bulky support as required in current rotating platen so that the machine is preferably orientated in a vertical position relative to a floor space to reduce its footprint to as low as 15 square feet.
It is a further such object to provide a belted wafer polishing machine to increase production reliability and decrease interruption due to machine maintenance, together with higher throughput and better quality, which will result in reduction of cost of ownership.
It is a further such object to provide a method of polishing employing a belted polishing machine provided hereof.